
_USART_Send8:

;BTCommunication.c,1 :: 		void USART_Send8(unsigned char u8Data) {
;BTCommunication.c,3 :: 		while (!(UCSRA & (1 << UDRE)));
L_USART_Send80:
	IN         R16, UCSRA+0
	SBRC       R16, 5
	JMP        L_USART_Send81
	JMP        L_USART_Send80
L_USART_Send81:
;BTCommunication.c,5 :: 		UDR = u8Data;
	OUT        UDR+0, R2
;BTCommunication.c,6 :: 		}
L_end_USART_Send8:
	RET
; end of _USART_Send8

_Timer0Overflow_ISR:
	PUSH       R30
	PUSH       R31
	PUSH       R27
	IN         R27, SREG+0
	PUSH       R27

;BTCommunication.c,12 :: 		void Timer0Overflow_ISR() org IVT_ADDR_TIMER0_OVF {
;BTCommunication.c,14 :: 		if (counter >= _THRESHOLD) {
	PUSH       R2
	LDS        R16, _counter+0
	CPI        R16, 20
	BRSH       L__Timer0Overflow_ISR15
	JMP        L_Timer0Overflow_ISR2
L__Timer0Overflow_ISR15:
;BTCommunication.c,15 :: 		if((ispis % 2) != 0){
	LDS        R16, _ispis+0
	ANDI       R16, 1
	CPI        R16, 0
	BRNE       L__Timer0Overflow_ISR16
	JMP        L_Timer0Overflow_ISR3
L__Timer0Overflow_ISR16:
;BTCommunication.c,16 :: 		USART_Send8((rand()%60)+40);
	CALL       _rand+0
	LDI        R20, 60
	LDI        R21, 0
	CALL       _Div_16x16_S+0
	MOVW       R16, R24
	SUBI       R16, 216
	MOV        R2, R16
	CALL       _USART_Send8+0
;BTCommunication.c,17 :: 		}
L_Timer0Overflow_ISR3:
;BTCommunication.c,18 :: 		ispis++;
	LDS        R16, _ispis+0
	SUBI       R16, 255
	STS        _ispis+0, R16
;BTCommunication.c,19 :: 		counter = 0;                // reset counter
	LDI        R27, 0
	STS        _counter+0, R27
;BTCommunication.c,20 :: 		}
	JMP        L_Timer0Overflow_ISR4
L_Timer0Overflow_ISR2:
;BTCommunication.c,22 :: 		counter++;                  // increment counter
	LDS        R16, _counter+0
	SUBI       R16, 255
	STS        _counter+0, R16
L_Timer0Overflow_ISR4:
;BTCommunication.c,24 :: 		}
L_end_Timer0Overflow_ISR:
	POP        R2
	POP        R27
	OUT        SREG+0, R27
	POP        R27
	POP        R31
	POP        R30
	RETI
; end of _Timer0Overflow_ISR

_main:
	LDI        R27, 255
	OUT        SPL+0, R27
	LDI        R27, 0
	OUT        SPL+1, R27

;BTCommunication.c,26 :: 		void main() {
;BTCommunication.c,28 :: 		int i = 0;
	PUSH       R2
	PUSH       R3
;BTCommunication.c,29 :: 		srand(1121);
	LDI        R27, 97
	MOV        R2, R27
	LDI        R27, 4
	MOV        R3, R27
	CALL       _srand+0
;BTCommunication.c,30 :: 		UART1_Init(9600);               // Initialize UART module at 9600 bps
	LDI        R27, 51
	OUT        UBRRL+0, R27
	LDI        R27, 0
	OUT        UBRRH+0, R27
	CALL       _UART1_Init+0
;BTCommunication.c,31 :: 		Delay_ms(100);
	LDI        R18, 5
	LDI        R17, 15
	LDI        R16, 242
L_main5:
	DEC        R16
	BRNE       L_main5
	DEC        R17
	BRNE       L_main5
	DEC        R18
	BRNE       L_main5
;BTCommunication.c,32 :: 		UART1_Write(0x02); // Send STX (Start of Transmission)
	LDI        R27, 2
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,33 :: 		UART1_Write(0x52); // Type = REQ
	LDI        R27, 82
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,34 :: 		UART1_Write(0x04); // Opcode = GAP_WRITE_LOCAL_NAME
	LDI        R27, 4
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,35 :: 		UART1_Write(0x0A); // Length = 10 (16-bit)
	LDI        R27, 10
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,36 :: 		UART1_Write(0x00);
	CLR        R2
	CALL       _UART1_Write+0
;BTCommunication.c,37 :: 		UART1_Write(0x60); // Checksum
	LDI        R27, 96
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,39 :: 		UART1_Write(0x09); // Number of characters in the name
	LDI        R27, 9
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,40 :: 		UART1_Write(0x4D); // ASCII -> M
	LDI        R27, 77
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,41 :: 		UART1_Write(0x49); // ASCII -> I
	LDI        R27, 73
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,42 :: 		UART1_Write(0x4E); // ASCII -> N
	LDI        R27, 78
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,43 :: 		UART1_Write(0x4F); // ASCII -> O
	LDI        R27, 79
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,44 :: 		UART1_Write(0x54); // ASCII -> T
	LDI        R27, 84
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,45 :: 		UART1_Write(0x41); // ASCII -> A
	LDI        R27, 65
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,46 :: 		UART1_Write(0x55); // ASCII -> U
	LDI        R27, 85
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,47 :: 		UART1_Write(0x52); // ASCII -> R
	LDI        R27, 82
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,48 :: 		UART1_Write(0x00); // ASCII -> NULL (ends with a NULL)
	CLR        R2
	CALL       _UART1_Write+0
;BTCommunication.c,49 :: 		UART1_Write(0x03); // Send ETX (End of Transmission)
	LDI        R27, 3
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,51 :: 		Delay_ms(100);
	LDI        R18, 5
	LDI        R17, 15
	LDI        R16, 242
L_main7:
	DEC        R16
	BRNE       L_main7
	DEC        R17
	BRNE       L_main7
	DEC        R18
	BRNE       L_main7
;BTCommunication.c,53 :: 		UART1_Write(0x02); // Send STX (Start of Transmission)
	LDI        R27, 2
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,54 :: 		UART1_Write(0x52); // Type = REQ
	LDI        R27, 82
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,55 :: 		UART1_Write(0x4E); // Opcode = SET_EVENT_FILTER
	LDI        R27, 78
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,56 :: 		UART1_Write(0x01); // Length = 1 (16-bit)
	LDI        R27, 1
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,57 :: 		UART1_Write(0x00);
	CLR        R2
	CALL       _UART1_Write+0
;BTCommunication.c,58 :: 		UART1_Write(0xA1); // Checksum
	LDI        R27, 161
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,59 :: 		UART1_Write(0x03); // Payload = 3 (full cable replacement)
	LDI        R27, 3
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,60 :: 		UART1_Write(0x03); // Send ETX (End of Transmission)
	LDI        R27, 3
	MOV        R2, R27
	CALL       _UART1_Write+0
;BTCommunication.c,61 :: 		Delay_ms(100);
	LDI        R18, 5
	LDI        R17, 15
	LDI        R16, 242
L_main9:
	DEC        R16
	BRNE       L_main9
	DEC        R17
	BRNE       L_main9
	DEC        R18
	BRNE       L_main9
;BTCommunication.c,63 :: 		SREG_I_bit = 1;               // Interrupt enable
	IN         R27, SREG_I_bit+0
	SBR        R27, BitMask(SREG_I_bit+0)
	OUT        SREG_I_bit+0, R27
;BTCommunication.c,64 :: 		TOIE0_bit  = 1;               // Timer0 overflow interrupt enable
	IN         R27, TOIE0_bit+0
	SBR        R27, BitMask(TOIE0_bit+0)
	OUT        TOIE0_bit+0, R27
;BTCommunication.c,65 :: 		TCCR0  = 5;                   // Start timer with 1024 prescaler
	LDI        R27, 5
	OUT        TCCR0+0, R27
;BTCommunication.c,66 :: 		while(1){
L_main11:
;BTCommunication.c,67 :: 		}
	JMP        L_main11
;BTCommunication.c,68 :: 		}
L_end_main:
L__main_end_loop:
	JMP        L__main_end_loop
; end of _main
